1. Field
The present invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier
2. Description of the Related Art
Generally, a printed circuit board is constructed in a manner such that a board which is composed of various thermosetting synthetic resins is wired at one or both sides thereof with copper foils, IC or electronic devices are arranged and mounted on the board and electrically connected to each other and then the resulting board with the electronic devices mounted thereon is coated with an insulating material.
With an increase in demand for the miniaturization and increased functionality of electronic devices as a result of the development of the electronic industries, printed circuit boards on which the electronic devices are mounted are also required to accommodate high density wiring and to be slim.
Particularly, intensive research into a printed circuit board which is thin and a method of manufacturing the printed circuit board which are designed to reduce a total thickness thereof and thus reduce signal processing time are under vigorous progress.
In a process of manufacturing a thin substrate, a carrier which serves as a support for the thin substrate during the manufacturing process is used.
FIG. 1 shows a cross-sectional view of a conventional carrier which is adapted to be used in manufacture of a thin substrate.
As shown in FIG. 1, the conventional carrier 10 is configured such that a pair of metal bases 12a and 12b which includes respective metal barrier layers 14a and 14b thereon is attached to each other via an adhesive material 16 disposed therebetween.
In this regard, the pair of metal bases 12a and 12b may be made of metals such as copper (Cu), aluminum (Al) or iron (Fe), while the metal barrier layers 14a and 14b may be made of titanium (Ti). The metal barrier layers 14a and 14b are formed by a dry coating technique such as vacuum deposition, sputtering or ion plating. The adhesive material 16 is disposed on the other side of the metal bases 12a and 12b to connect them with each other.
FIGS. 2 to 10 are cross-sectional views sequentially showing a conventional process of manufacturing a thin substrate using the carrier shown in FIG. 1. Referring to the drawings, the process of manufacturing a thin substrate is described below.
First, first plating layers 18a and 18b are formed on the metal barrier layers 14a and 14b of the carrier 10 (FIG. 2). At this point, the first plating layers 18a and 18b may be composed of an electroless plating layer and an electrolytic plating layer.
Subsequently, the first plating layers 18a and 18b are patterned to form first circuit layers 20a and 20b (FIG. 3).
First insulating layers 22a and 22b are disposed thereon (FIG. 4).
Via-holes 24a and 24b are formed in the first insulating layers 22a and 22b so as to expose the first circuit layers 20a and 20b to the outside (FIG. 5).
Second plating layers 26a and 26b are formed on the first insulating layers 22a and 22b and inner surfaces of the via-holes 24a and 24b (FIG. 6). In this regard, each of the second plating layers 26a and 26b are composed of an electroless plating layer and an electrolytic plating layer.
The second plating layers 26a and 26b are patterned to form second circuit layers 28a and 28b (FIG. 7).
Thereafter, a routing process is conducted along routing lines RL, with the result that the pair of metal bases 12a and 12b separate from each other (FIG. 8).
The metal bases 12a and 12b and the metal barrier layers 14a and 14b are removed (FIG. 9). At this point, because the metal bases 12a and 12b and the metal barrier layers 14a and 14b are made of different materials, they are sequentially removed using different etching solutions.
Finally, solder resist layers 30a and 30b are formed on both sides of each of the first insulating layers 22a and 22b, and then openings 32a and 32b are formed in the solder resist layers 30a and 30b to allow the pads to be exposed (FIG. 10).
According to the conventional process, the carrier 10, which serves as a component being removed after completion of manufacturing, is composed of the metal bases 12a and 12b and the metal barrier layers 14a and 14b. Consequently, the conventional process is problematic in that removal of the metal bases 12a and 12b and the metal barrier layers 14a and 14b requires at least two kinds of different etching solutions and at least two etching processes.
Additionally, according to the conventional process, since the carrier which is removed after completion of manufacture of a substrate is made of expensive metal, manufacturing costs are increased.